Keynote Speaker
Speaker: Dr. Ahmed Louri
Department of Electrical and Computer Engineering, University of Arizona, Tucson
Title: Power-Efficient and Reliable Network-on-Chips For Scalable Multi-core Architectures
URL: http://www2.engr.arizona.edu/~hpcat/director.htm
Department of Electrical and Computer Engineering, University of Arizona, Tucson
Title: Power-Efficient and Reliable Network-on-Chips For Scalable Multi-core Architectures
URL: http://www2.engr.arizona.edu/~hpcat/director.htm
Biography:
Dr. Ahmed Louri received the M.S and Ph.D. degrees in Computer Engineering from the University of Southern California, Los Angeles in 1984 and 1988 respectively. He joined the University of Arizona in 1988 where he is currently a Professor of Electrical and Computer Engineering and the Director of the High Performance Computing Architectures and Technologies Laboratory.
Dr. Louri chaired the Computer Engineering Program of the Electrical and Computer Engineering Department from 2000 to 2006.
From 2010 to 2013, he served as a Program Director in the Division of Division of Computing and Communication Foundations (CCF), in the Directorate for Computer and Information Science and Engineering (CISE) of the National Science Foundation. The CISE directorate has an annual research portfolio of $800 million. He managed the core computer architecture program and was on the management team of several cross-cutting programs. As a Program Director he was responsible for (1) long-range planning and budget development for the areas of computer architecture, high-performance computing, communications, emerging technologies (nanotechnology, photonics, opto-electronics), and related fields, (2) managing an effective timely merit review, award and declination process, (3) advising the community of current and future funding opportunities, (4) coordinating and collaborating with other federal funding agencies and organizations, and (5) advising the federal government of future funding and growth trends in computing. He directed research growth and funding of core computer systems architecture (CSA), high performance computing (HPC) and cross-cutting programs such as trustworthy computing (TC, currently this program is SaTC), cyber-physical systems (CPS), Expeditions in Computing (EIC), sustainability (SEES), cyber-discovery initiative (CDI), computing research infrastructure (CRI), and Failure-Resistant Systems (FRS). He supervised more than 200 Principal Investigators and conducted outreach to national and international academic, research, and scientific communities. He initiated scientific programs for transformational research, research infrastructure and multidisciplinary research in several key areas of computer architecture, high-performance computing, sustainability, emerging technologies, resiliency, and security He previously held visiting scientist positions at the Communications Research Laboratory (Tokyo, Japan), Laboratoire d'Informatique du Parallelism (LIP) (Lyon France), University of Tsukuba (Tsukuba, Japan), Universite de Paul Sabatier (Toulouse, France), and the National Center for Scientific Research (Centre Nationale de Recherche Scientifique (CNRS)) Toulouse, France.
His primary research interests include computer architecture, parallel and distributed computing, interconnection networks, optical interconnects for parallel computing systems, reconfigurable computing systems, scalable and power-efficient architectures, fault-tolerant multiprocessors, Network on chips (NoCs) for multi-core and many-core architectures, fault-tolerant and self-healing NoCs, emerging interconnect technologies (photonic, wireless, RF, hybrid) for multi-core architectures and Chip Multiprocessors (CMPs), embedded and SoC systems. He has published more than 125 journal articles and conference papers in these areas, and holds several US patents. His research has been sponsored by NSF, DOE, AFOSR, and a number of industrial organizations.
Dr. Louri is the recipient of the National Science Foundation Research Initiation Award (1989), the Best article Award from IEEE Micro, the Advanced Telecommunications Organization of Japan Fellowship, the Centre Nationale de Recherche Scientifique (CNRS), France, Fellowship, and the Japan Society for the Promotion of Science Fellowship, and several teaching awards. Dr. Louri was instrumental in bringing optical interconnects into mainstream research in interconnection networks and bridging the gap between computer architecture and optics research communities. He served as a General Chair for the 13th Annual Symposium of the High Performance Computer Architecture (HPCA-13), Phoenix, Arizona, 2007, the general Co-Chair of the Second Workshop on Optics in Communications and Computer Sciences (WOCCS-99), Toulouse France, 1999, and the General Chair for the Workshop on Optics in High-Performance Computing Systems, Lyon France 1996. He has served as a technical committee member for numerous international conferences including, Optical Society of America, meetings on Optics in Computing, the IEEE/OSA conference on Massively Parallel Processing using Optical Interconnects (MPPOI), the International conference on Parallel and Distributed computing and Systems (PDCS), the International Conference on Computing and Information (ICCI), the International Conference on Parallel Processing (ICPP), the International Symposium on High Performance Computer Architecture (HPCA), the ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS), the IEEE/ACM International Symposium on Microarchitecture (IEEE Micro - 2012), the International Conference on Parallel Architectures and Compilation Techniques (PACT-2013), the ACM/IEEE International Symposium on Networks-on-Chip (NOCS, 2012, 2013,2014). He has served as Guest Editor for Journal of Parallel and Distributed Computing (JPDC, 2010-2011) and is currently serving as an Associate Editor of IEEE Transactions on Computers.
Dr. Louri is a Fellow of the IEEE, and a member of the IEEE Society Technical Committee on Computer Architecture and member of the IEEE Technical Committee on Parallel Processing.
From 2010 to 2013, he served as a Program Director in the Division of Division of Computing and Communication Foundations (CCF), in the Directorate for Computer and Information Science and Engineering (CISE) of the National Science Foundation. The CISE directorate has an annual research portfolio of $800 million. He managed the core computer architecture program and was on the management team of several cross-cutting programs. As a Program Director he was responsible for (1) long-range planning and budget development for the areas of computer architecture, high-performance computing, communications, emerging technologies (nanotechnology, photonics, opto-electronics), and related fields, (2) managing an effective timely merit review, award and declination process, (3) advising the community of current and future funding opportunities, (4) coordinating and collaborating with other federal funding agencies and organizations, and (5) advising the federal government of future funding and growth trends in computing. He directed research growth and funding of core computer systems architecture (CSA), high performance computing (HPC) and cross-cutting programs such as trustworthy computing (TC, currently this program is SaTC), cyber-physical systems (CPS), Expeditions in Computing (EIC), sustainability (SEES), cyber-discovery initiative (CDI), computing research infrastructure (CRI), and Failure-Resistant Systems (FRS). He supervised more than 200 Principal Investigators and conducted outreach to national and international academic, research, and scientific communities. He initiated scientific programs for transformational research, research infrastructure and multidisciplinary research in several key areas of computer architecture, high-performance computing, sustainability, emerging technologies, resiliency, and security He previously held visiting scientist positions at the Communications Research Laboratory (Tokyo, Japan), Laboratoire d'Informatique du Parallelism (LIP) (Lyon France), University of Tsukuba (Tsukuba, Japan), Universite de Paul Sabatier (Toulouse, France), and the National Center for Scientific Research (Centre Nationale de Recherche Scientifique (CNRS)) Toulouse, France.
His primary research interests include computer architecture, parallel and distributed computing, interconnection networks, optical interconnects for parallel computing systems, reconfigurable computing systems, scalable and power-efficient architectures, fault-tolerant multiprocessors, Network on chips (NoCs) for multi-core and many-core architectures, fault-tolerant and self-healing NoCs, emerging interconnect technologies (photonic, wireless, RF, hybrid) for multi-core architectures and Chip Multiprocessors (CMPs), embedded and SoC systems. He has published more than 125 journal articles and conference papers in these areas, and holds several US patents. His research has been sponsored by NSF, DOE, AFOSR, and a number of industrial organizations.
Dr. Louri is the recipient of the National Science Foundation Research Initiation Award (1989), the Best article Award from IEEE Micro, the Advanced Telecommunications Organization of Japan Fellowship, the Centre Nationale de Recherche Scientifique (CNRS), France, Fellowship, and the Japan Society for the Promotion of Science Fellowship, and several teaching awards. Dr. Louri was instrumental in bringing optical interconnects into mainstream research in interconnection networks and bridging the gap between computer architecture and optics research communities. He served as a General Chair for the 13th Annual Symposium of the High Performance Computer Architecture (HPCA-13), Phoenix, Arizona, 2007, the general Co-Chair of the Second Workshop on Optics in Communications and Computer Sciences (WOCCS-99), Toulouse France, 1999, and the General Chair for the Workshop on Optics in High-Performance Computing Systems, Lyon France 1996. He has served as a technical committee member for numerous international conferences including, Optical Society of America, meetings on Optics in Computing, the IEEE/OSA conference on Massively Parallel Processing using Optical Interconnects (MPPOI), the International conference on Parallel and Distributed computing and Systems (PDCS), the International Conference on Computing and Information (ICCI), the International Conference on Parallel Processing (ICPP), the International Symposium on High Performance Computer Architecture (HPCA), the ACM/IEEE Symposium on Architectures for Networking and Communication Systems (ANCS), the IEEE/ACM International Symposium on Microarchitecture (IEEE Micro - 2012), the International Conference on Parallel Architectures and Compilation Techniques (PACT-2013), the ACM/IEEE International Symposium on Networks-on-Chip (NOCS, 2012, 2013,2014). He has served as Guest Editor for Journal of Parallel and Distributed Computing (JPDC, 2010-2011) and is currently serving as an Associate Editor of IEEE Transactions on Computers.
Dr. Louri is a Fellow of the IEEE, and a member of the IEEE Society Technical Committee on Computer Architecture and member of the IEEE Technical Committee on Parallel Processing.
Speaker: Dr. Yutong Lu
Director of the System Software Laboratory
School of Computer Science
National University of Defense Technology (NUDT)
Title: Scalable Computing for HPC
Director of the System Software Laboratory
School of Computer Science
National University of Defense Technology (NUDT)
Title: Scalable Computing for HPC
Biography:
Professor Yutong Lu is the Director of the System Software Laboratory, School of Computer Science, National University of Defense Technology (NUDT), Changsha, China. She is also a professor in the State Key Laboratory of High Performance Computing, China. She got her B.S, M.S, and PhD degrees from the NUDT. Her extensive research and development experience has spanned several generations of domestic supercomputers in China. During this period, Prof. Lu was the Director Designer for the Tianhe-1A and Tianhe-2 systems, both of which have been internationally recognized as the top-ranked supercomputing system worldwide in respectively. Her continuing research interests include parallel operating systems, high speed communications, global file systems, and advanced programming environments.
Professor Yutong Lu is the Director of the System Software Laboratory, School of Computer Science, National University of Defense Technology (NUDT), Changsha, China. She is also a professor in the State Key Laboratory of High Performance Computing, China. She got her B.S, M.S, and PhD degrees from the NUDT. Her extensive research and development experience has spanned several generations of domestic supercomputers in China. During this period, Prof. Lu was the Director Designer for the Tianhe-1A and Tianhe-2 systems, both of which have been internationally recognized as the top-ranked supercomputing system worldwide in respectively. Her continuing research interests include parallel operating systems, high speed communications, global file systems, and advanced programming environments.