Keynote speakers

	Professor Yuanyuan Yang Department of Electrical and Computer Engineering Stony Brook University, Stony Brook, New York 11794, USA Talk: Exploring Server Redundancy in Nonblocking Multicast Data Center Networks
Abstract: Clos networks and their variations such as folded-Clos networks (fat-trees) have been widely adopted as network topologies in data center networks. Since multicast is an essential communication pattern in many cloud services, nonblocking multicast communication can ensure the high performance of such services. However, nonblocking multicast Clos networks are costly due to the large number of core switches required. On the other hand, server redundancy is ubiquitous in today's data centers to provide high availability of services. In this talk, we explore server redundancy in data centers to reduce the cost of data center networks. First, we consider ideal data centers with no server failure. We show that the sufficient nonblocking condition on the number of core switches for multicast Clos data center networks can be significantly reduced, when the data center is 2-redundant, i.e., each server in the data center has exactly one redundant backup. We also investigate general redundant Clos data center networks where servers may have different numbers of redundant backups depending on the availability requirements of services, and show that a higher redundancy level further reduces the cost of nonblocking multicast Clos data center networks. Next, we extend the results to faulty data centers, where one or more active servers may fail at any time. We show that the nonblocking conditions for fault-free data centers still hold for the faulty case after reassigning active servers among edge switches. We also extend the results to the multirate network model that more accurately describes the communication environment of data center networks. Finally, we provide a multicast routing algorithm with linear time complexity to configure multicast connections in Clos data center networks. Biography: Yuanyuan Yang is a Professor of Electrical & Computer Engineering and Computer Science at Stony Brook University (SUNY at Stony Brook), and the Director of Communications and Devices Division at New York State Center of Excellence in Wireless and Information Technology (CEWIT). She received her PhD degree in computer science from Johns Hopkins University, Baltimore, Maryland, in 1992. Dr. Yang's research interests include interconnection networks, date center networks, wireless/mobile networks, optical networks, and high-speed networks. She has authored or coauthored more than 240 research articles in leading refereed journals and conferences on these topics. She is also an inventor/co-inventor of seven U.S. patents in the area of interconnection networks. She is a Fellow of the IEEE.
	ProfessorXian-He Sun Department of Computer Science Illinois Institute of Technology, Chicago, USA Talk: Memory System for Extreme-Scale Computing
Abstract: Technology advances are unbalanced. CPU performance has been improving at a much faster pace than memory technologies during the last three decades, which has led to the so-called memory-wall problem. In the meantime, newly emerged IT applications, such as computer animation, social networks, and sensor networks, are all data intensive, which has led to the so-called big-data problem. The lasting memory-wall problem compounded with the newly emerged big-data problem has changed the landscape of computing. CPU speed is no longer the performance bottleneck of a computing system, the data access speed is. However, historically computing systems are designed and developed to utilize CPU performance, not data accessing. A paradigm change is needed to support data-centric computing. In this talk we first review the history and concepts of the big-data and memory-wall problems. We then discuss the challenges of design advanced memory systems for extreme-scale computing. Finally, we present some our recent results in understanding and optimizing the performance of memory systems from the data-centric point-of-view. Biography: Dr. Xian-He Sun is the chairman and a professor of the Department of Computer Science, the director of the Scalable Computing Software laboratory at the Illinois Institute of Technology (IIT) and a guest faculty in the Mathematics and Computer Science Division at the Argonne National Laboratory. Before joining IIT, he worked at DoE Ames National Laboratory, at ICASE, NASA Langley Research Center, at Louisiana State University, Baton Rouge, and was an ASEE fellow at Navy Research Laboratories. Dr. Sun is an IEEE fellow and his research interests include parallel and distributed processing, high-end computing, memory and I/O systems, and performance evaluation. He has close to 200 publications and 4 patents in these areas. More information about Dr. Sun can be found at his web site.
	Dr. Krishna Kant George Mason University Talk: Energy Adaptive Computing
Abstract: Energy efficiency is well recognized as a critical requirement of computing system design for a variety of reasons including cost, power density, and environmental impact. In this talk, I will motivate an approach that goes beyond energy efficiency and more directly addresses the sustainability issues. The key notion in this approach is smart adaptation of systems to the available energy. I will first motivate the need for energy adaptive computing and then discuss its application in a variety of environments. I will also elaborate on energy adaptation mechanisms in multi-tier data centers, considering computing, network, and storage aspects. I will then show how energy adaptation can be applied to peer-to-peer environments. Finally, I will discuss some broader issues regarding energy adaptation in the context of both the cyber-infrastructure and broader energy consuming cyber-physical systems. Biography: Krishna Kant is currently a Research Professor at the Center for Secure Information Systems at George Mason University, Fairfax VA. His current areas of research include robustness in the Internet, cloud computing security, and sustainable computing. He carries 30 years of combined experience in academia, industry, and government. He has published in a wide variety of areas in computer science including fault tolerant computing, traffic characterization, telecommunication systems, architectural modeling, Internet routing and name resolution, and data center management, among others. He has authored a graduate textbook on performance modeling of computer systems. He received his Ph.D. degree in 1981 from University of Texas at Dallas. He has since held positions at Northwestern University, Pennsylvania State University, Bell Labs, Bellcore (Telcordia), Intel, NSF, and GMU.
	Professor Trieu-Kien Truong (張肇健) IEEE Fellow Editor, IEEE Transactions on Communication Editor, Journal of Visual Communication at Image Representation Chair, IEEE Information Theory Society Tainan Chapter Chair Professor, Department of Information Engineering, I-Shou University, Taiwan Joint Appointment Professor, Department of Computer Science and Engineering, National Sun Yat-Sen University, Taiwan Talk: Error-Correcting Codes for Flash Memory
Abstract: NAND Flash is a popular storage media because of its ruggedness, power efficiency, and storage capacity. In order to store more bits per cell, flash devices further increase the storage density. Flash densities have roughly doubled every year. At the same time, manufacturers are pushing flash to further decrease the cost per gigabyte. In the past decades, error correction codes (ECC) have been widely adapted in a variety of topics related to communication systems, magnetic recording, compact discs and so on. Also, error correction is an integral part of using NAND flash that ensures data correctly. In this talk, we will discuss the strategies used for NAND flash error correction codes (ECC) such as Hamming codes, Bose-Chaudur-Hocquenghem (BCH) codes, Reed-Solomon (RS) codes, and Low-density parity check (LDPC) codes, and provide a basis for making decisions on how to best support next generation NAND devices. Biography: Trieu-Kien Truong (M'82-SM'83-F'99) was born in Vietnam on December 4, 1944. He received the B.S. degree from National Cheng Kung University, Tainan, Taiwan, in 1967, the M.S. degree from Washington University, St. Louis, MO, in 1971, and the Ph.D. degree from the University of Southern California, Los Angeles, in 1976, all in electrical engineering. From 1975 to 1992, he was a Senior Member of Technical Staff (E6) with the Communication System Research Section, Jet Propulsion Laboratory, Pasadena, CA. From 1992 to 1995, he was an Adjunct Professor of the Department of Electrical Engineering, University of Southern California, Los Angeles, California, USA. Currently, he is a Chair Professor of Collage of Electrical and Information Engineering, and the Department of Information Engineering, I-Shou University, Kaohsiung, Taiwan, and a joint appointment Professor of the Department of Computer Science and Engineering, National Sun Yat-Sen University, Taiwan. His research interests include error-correcting codes, VLSI architecture design, communication systems, signal processing, and image compression.